Applications of the short-range wireless network having a range of several centimeters to several meters are now being proposed and technologies for satisfying those applications are also now being developed. As a typical example, wireless personal area networks (WPANs, assumed communication range of about one meter to ten meters) have become widespread and further, wireless body area networks (WBANs, assumed communication range of about several centimeters to three meters) have been proposed and standardization for WBANs is now underway. As measures for satisfying requests for power reduction (for example, battery life of several years) and cost reduction (for example, chip cost of one dollar or less), which are unique to such short-range wireless technology, there has conventionally been adopted an RF circuit developed under the digital CMOS technology or an architecture having digitized control and signal processing, to thereby scale down the device dimension of the CMOS of a radio LSI so as to reduce a chip area and power supply voltage.
In recent years, on the other hand, there has been proposed an approach for attaining such goal through a method that is performed without scaling down the device dimension of the CMOS, although this approach has the same problem awareness of satisfying the above-mentioned requests. For example, there has been proposed a technology called energy harvesting in which vibration and light applied to a chip are converted into electrical power to be supplied to a power supply by using an acceleration sensor and a solar cell so as to provide a battery-less short-range radio terminal, such as a sensor network. According to this method, electrical power to be supplied from a battery to a circuit can be lowered or eliminated without reducing consumed electrical power by scaling down the device dimension. In the method for attaining power reduction by scaling down the device dimension, it is necessary to lower the power supply voltage, but a low power supply voltage is not appropriate for a radio circuit which requires a dynamic range of 100 dB or larger in terms of power ratio. The energy harvesting technology is therefore more advantageous than the method for attaining power reduction by scaling down the device dimension in that it is possible to eliminate the user's time and effort for replacing the battery without degrading the performance of the radio circuit. However, even the energy harvesting technology cannot achieve the cost reduction because the acceleration sensor and the solar cell, which are provided outside the chip, are required as described above.
In view of the problem that the performance of the RF circuit is degraded through the approach for attaining power reduction and cost reduction by scaling down the device dimension and also the problem that the cost rises through the approach for attaining a battery-less device by energy harvesting, the inventor of this invention proposes an LSI technology for recovering electrical power from a frequency-multiplexed signal in Japanese Patent Application No. 2008-232280 (Patent Literature 1), which is scheduled to be published after the filing of the subject application. According to this technology, communication energy that can be always acquired from a transmitter to be a communication destination is acquired as data, and hence electrical power supplied from the battery can be reduced without scaling down the device dimension. In addition, a commonly-available CMOS can be used at any time to form the device on the LSI, and hence there is no cause of cost rise as in the energy harvesting. However, even this LSI technology for recovering electrical power has a limit in that this LSI technology is a technology for reducing only the electrical power of the terminal as in other conventional technologies and is thus not a technology for attaining power reduction by optimizing an entire wireless network that changes every moment.
Non Patent Literature 1 proposes a CMOS circuit having low power consumption for an intermediate frequency limiting amplifier and a received signal strength indicator of a radio receiver circuit. The CMOS circuit is employed so as to attain low power consumption and, in order to generate a control signal for a receiver circuit, by focusing attention on the fact that the strength of an intermediate frequency signal that is down-converted in the receiver contains information on the distance to a destination terminal, a DC voltage component corresponding to the signal strength is output to obtain the control signal for a reception dynamic range in a variable gain amplifier, for example.
FIG. 1 is a diagram illustrating a part of the contents disclosed in the Non Patent Literature. A signal input from an intermediate frequency input 101 is sent to an intermediate frequency amplifier 102 having seven stages connected in series, and is amplified at each stage.
An output branched from each amplifying stage is sent to a full-wave rectifier 104, and a voltage level thereof is converted into a current level by a smoothing filter 105, and after that, smoothed by a smoothing filter 105. Then, a DC voltage corresponding to a signal amplitude at the intermediate frequency input 101 is output to a received signal strength indicator output 106. This signal is used for gain control by a first-stage amplifier on the receiver side, for example.
Patent Literature 2 describes that, as an energy source for functional elements having a sensing function and a wireless radio communication function, a high-frequency energy of a carrier wave is converted into a DC signal by the rectifier circuit, and then the resultant signal is stored in a capacitor and is used for a processing circuit of portions having those functions.